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Design and FPGA Implementation of a Universal Chaotic Signal Generator Based on the Verilog HDL Fixed-Point Algorithm and State Machine Control 期刊论文
INTERNATIONAL JOURNAL OF BIFURCATION AND CHAOS, 2017, 卷号: 27, 期号: 3, 页码: 15
作者:  Qiu, Mo;  Yu, Simin;  Wen, Yuqiong;  Lu, Jinhu;  He, Jianbin;  Lin, Zhuosheng
收藏  |  浏览/下载：108/0  |  提交时间：2018/07/30
Chaotic system  fixed-point algorithm  state machine control  Verilog HDL  FPGA implementation  
Monotonicity of fixed point and normal mappings associated with variational inequality and its application 期刊论文
SIAM JOURNAL ON OPTIMIZATION, 2001, 卷号: 11, 期号: 4, 页码: 962-973
作者:  Zhao, YB;  Li, D
收藏  |  浏览/下载：95/0  |  提交时间：2018/07/30
variational inequalities  cocoercive maps  (strongly) monotone maps  fixed point and normal maps  iterative algorithm