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Design and FPGA-Based Realization of a Chaotic Secure Video Communication System
Chen, Shikun1; Yu, Simin1; Lu, Jinhu2,3; Chen, Guanrong4; He, Jianbin1
2018-09-01
Source PublicationIEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY
ISSN1051-8215
Volume28Issue:9Pages:2359-2371
AbstractThis paper initiates a systematic methodology for real-time chaos-based video encryption and decryption communications on the system design and algorithm analysis. The proposed system design and algorithm analysis have been validated on an FPGA hardware platform via Verilog Hardware Description Language (Verilog HDL). Based on the fundamental anti-control principles of dynamical systems, a 6-D real domain chaotic system is designed, and then the corresponding Verilog HDL algorithm is developed. The proposed Verilog HDL algorithm is utilized to design a real-time chaos-based secure video communication system, with a generalized design principle derived, which is implemented on an FPGA hardware platform equipped with an XUP Virtex-II chip. Following this line, the designed working mechanism is demonstrated by hardware experiments. The security performance is tested using the TESTU01 statistical test suites, the differential analysis, and the sensitivity of key parameters mismatch. Both theoretical analysis and experimental results validate the feasibility and reliability of the proposed system.
KeywordAnti-control of chaos chaos-based video encryption Verilog HDL algorithm FPGA-based realization TESTU01 test
DOI10.1109/TCSVT.2017.2703946
Language英语
Funding ProjectNational Key Research and Development Program of China[2016YFB0800401] ; National Natural Science Foundation of China[61621003] ; National Natural Science Foundation of China[61532020] ; National Natural Science Foundation of China[61671161] ; National Natural Science Foundation of China[11472290] ; Science and Technology Planning Project of Guangzhou of China[201510010136] ; Hong Kong Research Grants Council through the GRF[CityU 11208515]
WOS Research AreaEngineering
WOS SubjectEngineering, Electrical & Electronic
WOS IDWOS:000444843100023
PublisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Citation statistics
Cited Times:20[WOS]   [WOS Record]     [Related Records in WOS]
Document Type期刊论文
Identifierhttp://ir.amss.ac.cn/handle/2S8OKBNM/31263
Collection系统科学研究所
Affiliation1.Guangdong Univ Technol, Coll Automat, Guangzhou 510006, Guangdong, Peoples R China
2.Chinese Acad Sci, Acad Math & Syst Sci, Beijing 100190, Peoples R China
3.Univ Chinese Acad Sci, Beijing 100049, Peoples R China
4.City Univ Hong Kong, Dept Elect Engn, Hong Kong, Hong Kong, Peoples R China
Recommended Citation
GB/T 7714
Chen, Shikun,Yu, Simin,Lu, Jinhu,et al. Design and FPGA-Based Realization of a Chaotic Secure Video Communication System[J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY,2018,28(9):2359-2371.
APA Chen, Shikun,Yu, Simin,Lu, Jinhu,Chen, Guanrong,&He, Jianbin.(2018).Design and FPGA-Based Realization of a Chaotic Secure Video Communication System.IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY,28(9),2359-2371.
MLA Chen, Shikun,et al."Design and FPGA-Based Realization of a Chaotic Secure Video Communication System".IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY 28.9(2018):2359-2371.
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